Ultrasensitive negative capacitance phototransistors

The study targets overcoming the limitations of MoS2 photodetectors, particularly high dark current, low detectivity, and slow response that often accompany trap-mediated high responsivity or hybrid material strategies. While graphene photodiodes offer fast response but low gain due to ultrafast carrier recombination, MoS2 phototransistors provide high photoconductive gain owing to a finite bandgap and favorable transport, yet their performance has typically relied on uncontrollable trap states or complex hybrids (graphene, quantum dots, perovskites, dyes, plasmonics) which introduce leakage paths and elevated dark current. The authors hypothesize that engineering the gate dielectric with a ferroelectric hafnium zirconium oxide (HZO) layer can enable both strong photogating (via trapping of photoexcited holes in a ferroelectric local electrostatic field) and voltage amplification (via the negative capacitance effect), thereby achieving ultra-steep subthreshold slope, suppressed dark current, high light-to-dark current ratio, and ultrahigh detectivity under low operating voltages.

Prior MoS2 photodetectors achieved high responsivity (e.g., 880 A W−1 for monolayer MoS2 at 561 nm and 150 pW), largely due to traps in MoS2 or at MoS2/SiO2 interfaces, but suffered from low detectivity and slow, seconds-scale responses. Hybrid systems have been extensively explored: MoS2–PbS quantum dots yielded R ~6×10^5 A W−1 but with large dark current (~0.26 µA), low detectivity, and high operating voltage; HgTe QD hybrids show strong sensitivity but face quality control and fabrication challenges; integrating dyes or perovskites can enhance absorption and responsivity but change spectral characteristics and introduce leakage, raising dark current. Graphene integration can improve transport but adds interfacial complexity. Separately, ferroelectric negative capacitance in FETs has demonstrated sub-60 mV/dec switching and voltage amplification in MoS2 transistors with ferroelectric gate stacks, suggesting potential benefits for photodetection. This work builds on these insights by leveraging ferroelectric HZO to enhance photogating and exploit NC for barrier modulation and ultra-steep subthreshold behavior without resorting to complex hybrid absorbers.

Device architecture: Metal–ferroelectric–insulator–semiconductor FET (MFISFET) on p-type Si with TiN back gate, Hf0.5Zr0.5O2 (HZO) ferroelectric (10 nm) and Al2O3 insulator (6 nm) gate stack, multilayer MoS2 channel (optimized at 6.3 nm, ~9 layers), and Cr/Au (15/45 nm) source/drain electrodes. TiN serves as the gate electrode and template for high-quality ALD HZO. An amorphous Al2O3 interlayer improves HZO/MoS2 interface, suppresses gate leakage, enables capacitance matching, and enhances stability. Structural characterization: AFM measured MoS2 thickness (6.3 nm); GI-XRD (Supplementary) confirmed HZO ferroelectric phase; Cross-sectional TEM showed clear, flat MoS2/Al2O3/HZO/TiN interfaces with layer thicknesses ~6.3/6/10/40 nm; EDS mapping verified uniform elemental distribution without interdiffusion. Electrical characterization: Ferroelectric P–E loop of Au/HZO/TiN capacitors measured at ±2.8 V, 1 kHz, 1000 ms preset delay, yielding coercive field Ec ≈ 1.5 MV cm−1 and remnant polarization Pr ≈ 10 µC cm−2; LK fitting shows negative dP/dE region. Transfer/output characteristics measured using a Keysight B1500A on a Lakeshore probe station at room temperature; gate sweeps at 14.14 Hz; gate leakage monitored. Mobility extracted via μ = (L/W)(S/Cins)VDS−1(dIDS/dVG) using total gate insulator capacitance. Subthreshold slope SS = dVG/d(log10 IDS) computed; capacitance model developed with CS (MoS2 plus stray), COX (Al2O3), CFE (HZO). Derived SS expression: SS = [1 − CS(CFE−1 − COX−1)] × 60 mV/dec, highlighting need for capacitance matching and stability (total gate-channel capacitance positive). Thickness optimization: Systematically varied MoS2 thickness (Supplementary); found steeper SS with thicker MoS2 due to increased CS, but excessive thickness (~9.8 nm) introduced ~0.16 V hysteresis from traps and potential stability violation; optimal thickness = 6.3 nm (9 layers) produced hysteresis-free ultra-steep SS. Optoelectronic measurements: Performed in a dark room at room temperature with monochromatic light sources at 520 nm and 637 nm (Thorlabs ITC4001 and LM9LP laser, spot diameter ~1 mm). For mechanistic tests, VG set to VT,dark (−1.6 V) and VDS = 0.5 V; laser illuminated perpendicularly, uniformly covering the channel. Time-resolved responses captured with a Tektronix MDO3014 oscilloscope. Photocurrent and threshold shift extracted from VDS–IDS and VG–IDS curves; Peff computed as A·P·πr−2 (A: device area; P: laser output; r: spot radius).

• Ferroelectric HZO exhibits robust ferroelectricity (Ec ≈ 1.5 MV cm−1, Pr ≈ 10 µC cm−2) and a negative dP/dE region consistent with LK modeling, enabling negative capacitance operation.
• Optimized MFIS MoS2 phototransistors (MoS2 thickness 6.3 nm, HZO 10 nm, Al2O3 6 nm) achieve hysteresis-free ultra-steep subthreshold slopes: SSavg = 45 mV/dec, SSmin-forward = 17.64 mV/dec, SSmin-reverse = 25.55 mV/dec; mobility μ ≈ 54.2 cm^2 V−1 s−1; output characteristics are ohmic across gate biases.
• Under illumination, strong photogating from the ferroelectric local electrostatic field traps holes in the gate stack, producing a threshold shift ΔVT that increases with incident power and saturates as traps fill (P up to ~0.2 nW gives ΔVT ~0.21 V, then gradual saturation). Photocurrent scales with (dIDS/dVG)·ΔVT, making ultra-steep SS pivotal for large Iph.
• Negative capacitance and capacitance matching amplify the channel energy barrier drop beyond qΔVT: qΔV = qΔVT·[1 − CS(CFE−1 − COX−1)]−1 > qΔVT, boosting photocurrent and light-to-dark current ratios in the subthreshold regime.
• Optoelectronic performance at room temperature and low bias (VDS = 0.5 V, VG = −1.6 V): maximum photocurrent Iph ≈ 5.22 µA at Peff ≈ 1116 nW; light-to-dark current ratio up to ~5.8 × 10^7; responsivity R up to ~96.8 A W−1; ultrahigh detectivity D* up to ~4.75 × 10^14 cm Hz^1/2 W−1.
• The approach suppresses dark current by setting VG = VT,dark, polarizing the ferroelectric downward to deplete channel electrons in the dark, enabling both high sensitivity and low noise without hybrid absorbers.

The results validate that integrating a ferroelectric HZO layer into the gate stack of MoS2 phototransistors simultaneously enhances photogating and enables negative-capacitance-induced voltage amplification, yielding ultra-steep SS and a large effective barrier reduction under illumination. This combined mechanism directly addresses the long-standing trade-off in MoS2 photodetectors between high responsivity (often trap-mediated with slow response and high dark current) and high detectivity (limited by leakage in hybrid systems). By stabilizing the device in the subthreshold regime with suppressed dark current and exploiting ΔVT-induced barrier modulation amplified by NC, the devices achieve exceptional light-to-dark current ratios and detectivity at low operating voltages and room temperature. The capacitance engineering framework (matching CFE and COX relative to CS) provides a clear design rule for achieving sub-60 mV/dec SS and stable operation, and is broadly applicable to other 2D semiconductor phototransistors. The findings highlight a scalable, CMOS-compatible path to ultrasensitive photodetection without relying on complex hybrid materials that can introduce leakage or spectral changes.

This work demonstrates ultrasensitive negative-capacitance MoS2 phototransistors using a CMOS-compatible ferroelectric HZO/Al2O3 gate stack. Through dielectric capacitance engineering and semiconductor thickness optimization, the devices deliver hysteresis-free ultra-steep SS (down to 17.64 mV/dec), very high responsivity (~96.8 A W−1), and ultrahigh detectivity (~4.75 × 10^14 cm Hz^1/2 W−1) at room temperature and low bias. The performance gains arise from the synergy of strong ferroelectric-field-induced photogating (hole trapping and threshold shifts) and NC-based voltage amplification that magnifies the channel barrier reduction beyond qΔVT. This strategy avoids the drawbacks of hybrid photodetectors (leakage paths, elevated dark current, fabrication complexity) and offers a general blueprint for high-sensitivity, low-power optoelectronics in 2D materials. Future work could explore broader spectral operation, dynamic response optimization, and extending NC-ferroelectric gate engineering to other semiconductors and device architectures.

• Device stability and hysteresis are sensitive to capacitance matching and trap states. Increasing MoS2 thickness to ~9.8 nm introduced ~0.16 V hysteresis, likely due to increased structural defects and potential violation of the NC stability condition (total gate-channel capacitance must remain positive).
• The photogating-induced threshold shift and resulting gain saturate as hole traps fill in the ferroelectric/local interface region, limiting further increases in sensitivity at higher optical powers.
• Performance depends on precise control of dielectric thicknesses (HZO, Al2O3) and MoS2 thickness to satisfy matching and stability conditions, which may constrain process windows.
• While fast and high-gain operation is highlighted, detailed bandwidth/speed metrics are not fully reported in the provided text, and could be limited by trapping/detrapping dynamics inherent to photogating mechanisms.