3D integration enables ultralow-noise isolator-free lasers in silicon photonics

The study addresses the longstanding challenges that prevent silicon photonics from meeting ultralow-noise and stability requirements in high-precision applications (microwave oscillators, atomic physics, precision metrology). Conventional semiconductor lasers exhibit high phase noise and are sensitive to back-reflections, typically necessitating bulky, off-chip optical isolators that complicate packaging and cost. The research question is whether a 3D integrated architecture combining III–V gain media with ultralow-loss silicon nitride (SiN) waveguides can yield ultralow-noise, feedback-insensitive lasers that operate without isolators and are compatible with scalable silicon photonic integrated circuits. The purpose is to realize narrow-linewidth, stable on-chip lasers and demonstrate their utility (e.g., in microwave synthesis) while leveraging wafer-scale processes. The importance lies in enabling compact, robust, and manufacturable PICs that can replace bulk optics in demanding systems.

Prior work shows that high-performance Si photonics requires heterogeneous integration of non-group-IV materials, notably III–V, for efficient gain (lasers, amplifiers) but integrating magnetic materials for isolators is CMOS-fab-challenging. Ultralow-loss SiN has emerged as a leading platform for high-Q resonators and breakthroughs in metrology and communications, but achieving ULL requires high-temperature anneals incompatible with standard back-end processes and can be degraded by subsequent heterogeneous integration steps. Ultralow-noise lasers via self-injection locking (SIL) to ultrahigh-Q microresonators have been studied using discrete resonators (e.g., crystalline WGM, SiN rings/spirals) requiring off-chip coupling. Earlier heterogeneous integrations achieved SIL for soliton microcombs but retained relatively high frequency noise in the 1–100 kHz band, limiting microwave and sensing applications. Theoretical and experimental studies indicate that increasing cavity Q reduces phase noise and raises tolerance to optical feedback, potentially obviating isolators if ultrahigh-Q cavities are integrated with lasers.

- 3D PIC architecture: The chip is partitioned into vertically stacked functional layers: (1) a III–V gain layer for lasers, (2) a silicon photonics layer, (3) a silicon nitride redistribution layer (SiN RDL) to mediate interlayer coupling, and (4) a bottom ultralow-loss SiN (ULL) layer. Approximately 4.8 μm vertical separation between the Si and ULL SiN layers isolates the ULL waveguides from subsequent Si and InP processing. - Interlayer coupling: Unlike metal vias in electronics, photonic interconnects use evanescent coupling engineered via waveguide geometries. The SiN RDL provides efficient transitions between active (III–V/Si) and passive ULL SiN layers where required. - Fabrication approach: Combines monolithic and heterogeneous 3D integration. ULL SiN waveguides (CMOS-foundry processed on 200-mm wafer with high-temp anneal) are protected from later steps by the thick oxide spacer. The device achieves ultralow ULL SiN loss (~0.5 dB m−1 across S, C, L bands) and integrates high-performance III–V/Si DFB lasers. Ultrahigh-Q SiN resonators (intrinsic Q ≈ 50 million at the laser wavelength) are co-integrated. - Laser-resonator operation: Self-injection locking (SIL) of InP/Si DFB lasers to thermally tunable ultrahigh-Q SiN rings. Control knobs: laser current (wavelength), ring heater current (resonance), and Si-layer thermal phase tuner (forward/backward phase). Locking relies on Rayleigh backscattering in the resonator. - SIL dynamics characterization: Experimental setup measures delayed self-heterodyne spectra and time-domain power while sweeping on-chip phase tuner and ring heater. Phase-dependent transitions among locked (low-noise), chaotic coherence collapse, and free-running regimes are mapped. Locking range is measured for bidirectional thermal tuning; modeling isolates asymmetric locking behavior without thermal crosstalk. - Frequency noise measurement: Frequency noise spectra are recorded from both through and drop ports; comparisons made to thermorefractive noise limits for the 30-GHz-FSR ring and analyzer floors. - Feedback sensitivity measurement: Downstream reflections are introduced on-chip (and via external optics) to probe feedback regimes (I–III). Critical feedback level at the regime I/II boundary (fc) is calculated versus cavity-loaded Q and Rayleigh backscatter R; experiments quantify the highest tolerable reflection for free-running vs SIL outputs (through and drop ports). Frequency noise is tracked under feedback levels from −50 dB up to −6.9 dB. - Microwave generation demo: Two SIL lasers are heterodyned on a fast photodiode (PD). Tuning one ring resonance (keeping the other fixed) provides wide, continuous microwave frequency tuning. An optical phase-lock loop (OPLL) on laser current improves long-term stability. Spectra and phase noise of generated microwaves (0–50 GHz) are measured; maximum heterodyne spacing is limited by the PD bandwidth though optical resonances allow >375 GHz separation (>3 nm).

- Ultralow-loss integration: Demonstrated direct on-chip integration of III–V gain with ULL SiN waveguides exhibiting ~0.5 dB m−1 loss across S/C/L bands on the same 3D PIC; ultrahigh-Q rings with intrinsic Q ≈ 5×10^7. - Ultralow frequency noise via SIL: For a compact 30-GHz-FSR ring, measured frequency noise at the through port ≈ 250 Hz^2/Hz at 10-kHz offset and white floor ≈ 2.3 Hz^2/Hz; drop port white floor ≈ 1.7 Hz^2/Hz, corresponding to ~5-Hz fundamental linewidth. Performance is thermorefractive-noise limited; larger rings/spirals could yield sub-hertz linewidth. - Clear phase- and resonance-dependent SIL dynamics: On-chip phase tuning reveals periodic transitions among locked, chaotic, and free-running states without confounding coupling-loss variations; bidirectional thermal sweeps show asymmetric locking ranges (~1.4 GHz and ~2.4 GHz), with modeling attributing asymmetry to thermal effects. - Strong feedback insensitivity: Free-running laser enters feedback regime II at −41 dB on-chip reflection. Under SIL, the regime I boundary improves to −14 dB (through port) and > −10 dB (drop port). Stable linewidth is maintained even under −6.9 dB on-chip feedback (limited by chip–fibre coupling), equivalent to ~27–34 dB effective isolation improvement versus free-running operation. - Widely tunable low-noise microwave generation: Two SIL lasers yield heterodyne microwave signals continuously tunable from 0 to 50 GHz (1-GHz steps shown), with phase noise independent of carrier frequency (set by laser phase noise). Optical separation >3 nm enables potential >375-GHz heterodyne, limited by PD bandwidth in the setup. No isolators are used in the system. - Scalability and compatibility: The multilayer 3D architecture decouples active/passive layers, protects ULL performance, and is compatible with foundry Si components (modulators, Ge/Si PDs) and prospective 3D E–PIC integration.

Integrating ultrahigh-Q SiN resonators with III–V/Si DFB lasers in a 3D PIC directly reduces semiconductor laser phase noise and greatly enhances tolerance to downstream reflections, addressing both primary obstacles (linewidth and feedback sensitivity) to deploying silicon photonics in high-precision systems without isolators. The vertical separation and SiN RDL enable strong evanescent interlayer coupling while shielding ULL SiN from lossy back-end steps, preserving resonator Q. The SIL scheme leverages Rayleigh backscatter to set laser coherence by the resonator, achieving Hz-level linewidths with feedback robustness comparable to that provided by bulk isolators. This enables compact, robust, and scalable PICs suitable for microwave synthesis, sensing, and metrology. Demonstrated heterodyne microwave generation shows carrier-frequency-independent phase noise, promising low-noise millimetre-wave/terahertz synthesis in an on-chip architecture. Overall, the findings validate 3D integration as an effective route to ultralow-noise, isolator-free lasers and complex PIC systems.

This work demonstrates a wafer-scale 3D integration strategy that co-integrates III–V lasers with ultralow-loss SiN waveguides on silicon, achieving ultrahigh-Q resonators and self-injection-locked lasers with record-low frequency noise for a single chip. The approach eliminates the need for optical isolators by substantially increasing feedback tolerance, simplifies packaging, and enables isolator-free on-chip microwave synthesis with phase-noise performance defined by the ultrahigh-Q cavity. The multilayer architecture decouples functionalities, protects ULL layers, and is compatible with foundry Si components and future 3D electronic–photonic integration. Future directions include: scaling ring size/geometry to suppress thermorefractive noise for sub-hertz linewidths; co-locking multiple lasers to a common resonator for common-mode noise rejection; integrating higher-bandwidth PDs and on-chip III–V amplifiers for broader, higher-power microwave synthesis; extending to thicker SiN for nonlinear/dispersion-engineered applications; and incorporating additional materials (e.g., LiNbO3, SiC, AlN, III–V QDs) to expand functionality in a unified 3D E–PIC ecosystem.

- Current laser frequency noise is limited by thermorefractive noise of the 30-GHz-FSR ring; larger rings or spirals are needed for sub-hertz linewidths. - Thermal crosstalk during ring tuning affects measured locking ranges and free-running frequency drift. - Feedback tests are capped at −6.9 dB on-chip reflection by chip–fibre coupling loss; higher reflection tolerance beyond this limit was not quantified. - Microwave frequency range is limited by the bandwidth of the external photodiode used; on-chip higher-speed PDs would extend range and power. - The study did not observe or explore regime III in feedback dynamics; generalization to all operating conditions and device variants may require further investigation.