Low-loss and polarization insensitive 32 × 4 optical switch for ROADM applications

The paper addresses the need for compact, flexible, and stable optical network components driven by rising traffic from technologies such as 5G, VR/AR, AI, and big data. ROADMs enable dynamic, remote, and software-driven traffic routing in elastic optical networks, but conventional WSS implementations based on bulk optics (e.g., MEMS mirrors, DLP, LC, LCoS) limit compactness and cost. Integrated photonics offers node-on-a-blade solutions, yet prior integrated switches often suffer from high insertion loss and significant polarization dependence, hindering practical deployment. The research goal is to design and demonstrate a densely integrated, low-loss, and polarization-insensitive 32 × 4 optical switch suitable for ROADM applications. The study proposes using a high-index doped silica glass (HDSG) platform to balance fiber coupling loss, propagation loss, PDL, and integration density, targeting colorless, broadband operation with low crosstalk across C and L bands.

The authors review three mainstream ROADM technologies: wavelength blockers, planar lightwave circuits, and wavelength selective switches. Bulk-optic WSSs (MEMS mirrors, DLP, LC, LCoS) deliver colorless operation and moderate loss but lack compactness and cost efficiency. Integrated optical switching has advanced on platforms such as silicon MEMS, silicon thermo-optic, silicon electro-optic, silicon nitride, and hybrid Si/SiN, with demonstrations achieving high port counts and fast speeds. However, practical deployment demands low insertion loss, low PDL, and low crosstalk, which many integrated solutions lack due to large fiber-to-chip coupling loss (3–6 dB/facet) and high on-chip losses (5–15 dB). MRR-based switches, while wavelength-selective, are sensitive to temperature, exhibit dispersion and limited FSR, and are often polarization dependent. MZI-based switches, being less wavelength dependent and simpler to stabilize, are more suitable for ROADM when combined with WDM components. The HDSG platform, with adjustable index contrast (10–20%) and low-temperature PECVD deposition, promises low birefringence, low coupling loss with integrated spot-size converters, and low PDL across C/L bands, making it a strong candidate for integrated switches.

Platform and waveguides: CMOS-compatible HDSG with core index ~1.60 and cladding index ~1.45 (≈10% contrast). Bus waveguides: 2 µm height and ~2 µm width; bend radius 100 µm. Spot-size converters enable <0.4 dB/facet coupling loss and PDL <0.07 dB across C/L when coupling from SMF (10.4 µm MFD) into ~2 µm × 2 µm waveguide modes.

Switch architecture: A 32 × 4 switch topology consisting of 4 drop channels implemented using 4 × 4 crossbar units and cascaded 1 × 4 matrices. Default (heater OFF) routes inputs to express ports via cross ports; bar ports connect to 1 × 4 matrices to route selected drops. VOAs (1 × 1 switches with two 1 × 2 MMIs) are placed after each 4 × 4 crossbar unit’s cross port for express power flattening and to suppress crosstalk when a corresponding port is dropped. Total switching elements: 188 MZIs (including VOAs). Paths are not strictly balanced, but low propagation and switching losses minimize path-dependent IL differences.

Switch elements: 2 × 2 switches consist of two 2 × 2 directional couplers and balanced arms; 1 × 2 switches replace one coupler with an MMI and include an extra π/2 bias on one arm; VOA uses two MMIs. Thermo-optic phase shifters (heaters on one arm) provide π phase shift for switching. Single MZI element characterization (heater OFF) shows transmitted-port loss within 1 dB over C/L including two-facet coupling; two-facet coupling ≈0.5 dB at 1550 nm implies on-chip loss <0.1 dB per MZI in C band. Extinction ratio >20 dB over the band. Temporal response (fully packaged device): rise ≈294 µs, fall ≈368 µs.

3D integration and optical vias: Two identical bus layers separated by 800 nm mitigate in-plane crossing loss and crosstalk. Optical via design employs a two-stage vertical coupler: Stage 1 tapers bottom bus from 1 µm to 0.5 µm and top bus from 0.2 µm to 0.7 µm over 1350 µm; Stage 2 tapers bottom bus to 0.2 µm and top bus to 1 µm over 350 µm; then top bus expands 1 µm to 2 µm over 100 µm. Test structures with 30 cascaded vias yield per-via loss <0.06 dB across C/L and PDL <0.01 dB. Two-layer crossings (800 nm gap) characterized with 48 cascaded crossings show per-crossing loss <0.003 dB across C/L.

Packaging and measurement: Optical: 128-channel SMF array edge-coupled to chip. Electrical: chip mounted on ceramic substrate on PCB; tungsten heaters wire-bonded to aluminum trace pads. Measurements used a tunable laser source across C/L with polarization controller and power meter; fiber-fiber references subtracted. Drop-port tuning performed by scanning and optimizing heater powers; average power consumption ≈130 mW per switch with ±10% variation, higher toward chip center due to longer aluminum traces; mapping shows good uniformity across a 2 cm × 2 cm chip.

Use cases: Default state routes all 32 inputs to express ports with five switch elements per express path and single-sided packaging (all express ports brought to same side). Drop/add functionality realized by powering appropriate heaters in 4 × 4 and 1 × 4 matrices to route any input to any of four drop ports (and symmetrically support add).

• Express paths: Fiber-to-fiber loss below 2 dB at 1550 nm; below 3 dB across C/L for all 32 channels. Channel-to-channel loss variation <1.28 dB across C/L. PDL <0.3 dB in C band. Crosstalk to all four drop ports <−50 dB across C/L.
• Drop/add paths: For all inputs to each of drop 1–4, fiber-to-fiber loss <3.5 dB at 1550 nm and <5 dB across C/L. Loss variation within 2.2 dB across C/L (paths include 7–10 MZIs). Crosstalk to corresponding express port <−40 dB in C band. PDL within 0.3 dB in C band; higher in L band due to C-band optimization.
• Switch element metrics: Per MZI on-chip loss <0.1 dB in C band (inferred from ≈0.5 dB total two-facet coupling and <1 dB total transmitted-port loss). Extinction ratio >20 dB over C/L. Thermo-optic switching speed: rise ≈294 µs, fall ≈368 µs.
• 3D photonic interconnects: Optical via loss <0.06 dB per via across C/L with PDL <0.01 dB; two-layer crossing loss <0.003 dB per crossing across C/L.
• VOAs: 32 integrated VOAs exhibit PDL <1 dB in C band at 10 dB attenuation.
• Power: Average ≈130 mW per switch (including heater and trace dissipation), with ≈±10% variation; increased consumption toward chip center due to longer aluminum traces.
• Device scale: 188 MZI switch elements, 88 optical vias (44 bridges), and 618 3D crossings integrated on HDSG; single-sided 128-fiber array packaging demonstrated.

The results demonstrate that an HDSG-based, MZI-implemented 32 × 4 optical switch can achieve simultaneously low insertion loss, low PDL, and low crosstalk across the C band, addressing key ROADM deployment requirements. The moderate index contrast of HDSG enables efficient fiber coupling, low propagation loss, and low birefringence, while supporting sufficient integration density. The 3D two-layer bus with optical vias and crossings effectively mitigates in-plane crossing loss and crosstalk, enabling complex interconnectivity with negligible excess loss. Measured fiber-to-fiber losses for express and drop paths meet or exceed targets for link budget preservation, and PDL <0.3 dB in C band supports polarization-diverse coherent systems. Crosstalk levels (≤−50 dB express; ≤−40 dB drop-to-express) reduce interference and allow simultaneous add/drop operations. Thermo-optic switching speeds (~300–370 µs) are adequate for network reconfiguration and protection switching timescales. While broadband MZIs exhibit some wavelength dependence upon tuning, per-wavelength optimization is possible for wavelength-selective operation, maintaining compatibility with DWDM and ITU grids. Overall, the architecture validates a compact, colorless, broadband ROADM building block suitable for node-on-a-blade implementations.

The study presents a CMOS-compatible HDSG-based 32 × 4 optical switch employing MZI elements, 3D optical vias, and low-loss crossings, achieving low insertion loss (≤2 dB express at 1550 nm; ≤3 dB across C/L; ≤3.5 dB drop at 1550 nm; ≤5 dB across C/L), low PDL (≤0.3 dB in C band), and low crosstalk (≤−50 dB express; ≤−40 dB drop-to-express). The design integrates 188 switches, 88 optical vias, and 618 crossings, with integrated VOAs for power flattening and crosstalk suppression, and demonstrates uniform thermo-optic performance with ~130 mW per switch and ~300–370 µs response times. These results highlight HDSG as a strong platform for compact, robust ROADM switching with polarization insensitivity and broadband operation. Future work could focus on reducing L-band PDL via broadband optimization, lowering power consumption and thermal crosstalk, increasing port counts, integrating faster phase shifters, and co-integrating WDM components for fully integrated ROADM nodes.

• PDL increases in the L band since MZIs and electrical traces were optimized for the C band in this device.
• Thermo-optic actuation incurs relatively high power consumption (~130 mW per switch) and microsecond response times; not optimized for ultra-low-power or sub-µs switching.
• Path lengths are not perfectly balanced; although losses are low, residual path-dependent variations (≤2.2 dB across cases) remain.
• Measurements were performed at room temperature without active temperature control; environmental stability under varying conditions is not reported.
• Affiliation details for some authors (³) are not provided in the excerpt, and full device-scale environmental and long-term reliability testing are not discussed.