Enhancing the coherence of superconducting quantum bits with electric fields

Superconducting integrated circuits have evolved into a powerful architecture for creating artificial quantum systems. In state-of-the-art experiments, tens of qubits are coherently operated as quantum simulators and universal processors while access to prototype devices is being offered via the cloud to accelerate the development of practical quantum algorithms. On the way forward, mitigating decoherence is one of the central challenges, because it hinders further up-scaling and implementation of quantum error correction.

Today's processors typically employ transmon qubits that are based on discrete energy levels in non-linear lumped-element resonators formed by a capacitively shunted Josephson junction. A large part of decoherence in such qubits is due to dielectric loss in the native surface oxides of the capacitor electrodes. This loss shows a remarkably structured frequency dependence, which originates in the individual resonances of spurious atomic tunneling defects. These defects form a sparse bath of parasitic two-level quantum systems (TLS), invoked to explain the anomalous low-temperature properties of amorphous materials. When a TLS has an electric dipole moment, it may resonantly absorb energy from the oscillating electric field of the qubit mode, and efficiently dissipate it into the phonon or BCS quasiparticle bath. Moreover, TLS resonance frequencies may fluctuate in time due to interactions with thermally activated, randomly switching low-energy TLS. This mechanism transforms thermal noise into the qubit's environmental spectrum, causing fluctuations of the qubit's resonance frequency and energy relaxation rate. For quantum processors, this implies fluctuations of their quantum volume (computational power).

Recently, it was shown that the resonance frequencies of TLS located on thin-film electrodes and the substrate of a qubit circuit can be tuned by an applied DC-electric field. Accordingly, it becomes possible to tune defects that dominate qubit energy relaxation away from the qubit resonance, resulting in longer T₁. Here, the authors demonstrate this concept using a routine that maximizes T₁ by searching for an optimal electric field bias. The method was tested at various qubit resonance frequencies and increased the 30-minute averaged T₁ time by 23%. The ability to control the decohering TLS bath independently from the qubit is particularly useful for quantum processors using fixed-frequency qubits, where spoilage of individual qubits due to resonance collision with a strongly coupled defect can be alleviated in situ.

Device and setup: A flux-tunable transmon in X-Mon geometry was fabricated using a submicron Al/AlOx/Al Josephson junction (shadow evaporation) and designed to be stray-junction free. A DC electrode for applying an electric field was implemented as a copper foil insulated by Kapton and mounted on the lid of the sample housing about 0.9 mm above the chip. The electrode area was comparable to the chip to improve field homogeneity near the qubits. The electrode was biased against ground to generate the DC electric field.

TLS detection and characterization: TLS interacting with the qubit were probed via their effect on the qubit energy relaxation time T₁ versus qubit frequency, where Lorentzian minima indicate resonant coupling. A detailed TLS spectrum was obtained using swap-spectroscopy: the qubit is excited and tuned for a fixed interaction time to various probe frequencies; resonant TLS appear as enhanced decay of the excited-state population. Most TLS tuned with the applied E-field were attributed to defects at electrode interfaces; a single non-tunable TLS suggested a location in the junction barrier where no DC field exists.

Optimization routine for T₁: (1) Sweep the applied DC electric field over a chosen range and measure T₁ at each field. T₁ is extracted from exponential fits to the decay of the excited-state population after a microwave excitation pulse. (2) Smooth the T₁(E) data with a nearest-neighbor average to suppress narrow features and emphasize broader peaks that are more stable against TLS fluctuations. (3) Identify the E-field that maximizes the smoothed T₁ and set the bias to this value, approaching it from the same starting field used in the sweep to mitigate hysteresis from metastable fluctuators. (4) Perform a second pass: sweep more finely in a narrow window around the preliminary optimum until T₁ approaches the maximum observed in the first pass, thereby compensating potential hysteresis and avoiding unresolved sharp dips. The procedure typically required acquisition of about 60 T₁ points and took under 10 minutes; the search range can be reduced to shorten runtime to under a minute.

Benchmarking: For each chosen qubit frequency, T₁ was monitored for 30 minutes at zero DC field (reference). The optimization routine was then executed to find the optimal field, after which T₁ was again monitored for 30 minutes at the optimized field. This benchmarking was repeated for 59 different qubit operating frequencies.

Proposed scalable integration: A scheme for local per-qubit DC gate electrodes is proposed using a flip-chip architecture where a wiring chip carries patterned DC electrodes above each qubit island, separated by a thin-film insulator from the wiring chip ground plane. Simulations with 1 V bias show electric fields concentrated near the qubit island edges with horizontal decay on the order of the chip-to-chip spacing (~15 µm), yielding cross-talk below 10⁻⁴ for qubit separation d > 100 µm. Alternatively, electrodes can be placed on the backside of the qubit chip (with larger expected cross-talk due to the substrate thickness), which can be compensated based on FEM simulations. Estimated additional decoherence from dielectric and radiative loss introduced by the gate-electrode coupling limits T₁ to about 5 ms for the present and proposed configurations. Field requirements to detune relevant TLS by ~100 MHz are E ≈ 40 kV/m for a dipole component p ≈ 0.1 eÅ, achievable with a few volts across sub-mm spacing.

• Applying a DC-electric field to tune TLS away from qubit resonance increases qubit energy relaxation times T₁.
• Across 59 tested qubit frequencies, the 30-minute averaged T₁ improved in 85% of cases after optimization; 67% showed >10% improvement and 46% showed >20% improvement.
• Best single-case improvement was 108%; the average improvement was about 23% over a 30-minute interval following optimization.
• Immediately after optimization, the average T₁ gain was ~30%, decaying to slightly above 20% after 30 minutes due to TLS frequency fluctuations.
• The standard deviation of T₁ over 30 minutes increased on average by 17% at the optimized field; in 59% of cases, T₁ fluctuations increased post-optimization.
• The optimization routine typically took under 10 minutes (about 60 T₁ measurements) and can be accelerated to under 1 minute by reducing field range and averaging.
• Electric field strengths of ~40 kV/m are sufficient to detune relevant TLS by ~100 MHz; with electrode-qubit separations below 1 mm, a few volts bias suffices.
• Proposed flip-chip gate-electrode integration yields simulated cross-talk below 10⁻⁴ for qubit spacings >100 µm and estimates T₁ limits ~5 ms from added losses.

The study addresses the central challenge of decoherence in superconducting transmon qubits by directly manipulating the bath of parasitic TLS that dominate dielectric loss. By tuning TLS resonances with a DC electric field, strongly coupled defects are moved off the qubit frequency, thereby reducing resonant absorption and extending T₁. The method provides independent control over the environment without requiring qubit frequency changes, which is particularly beneficial for fixed-frequency qubits where tuning space is limited, and also simplifies frequency allocation and crosstalk management for tunable-qubit processors.

The approach is compatible with scalable processor architectures: local DC gate electrodes can be implemented in flip-chip stacks with negligible cross-talk and minimal added loss, enabling parallel and in situ optimization across many qubits. The results indicate that while improvements are substantial on average, TLS spectral diffusion and fluctuator-induced hysteresis cause time-dependent performance; thus, adaptive or recurrent optimization can maintain gains during operation.

Because dephasing T₂ in many contemporary transmons is often limited by energy relaxation at flux sweet spots or when refocusing is used, improvements in T₁ are expected to translate to longer T₂. Additionally, the routine can be extended to two-qubit gate operations that involve frequency excursions by biasing fields to minimize encounters with TLS across the traversed frequency range. Algorithmic enhancements—such as weighting peak width and stability, multi-pass averaging to mitigate fluctuators, or embedding feedback from real-time error metrics—can further increase robustness and benefits in practical processors.

This work demonstrates an experimental technique and automated routine to enhance superconducting transmon qubit coherence by applying a DC electric field that tunes dominant TLS defects out of resonance. Benchmarking over many operating points shows an average 23% increase in 30-minute averaged T₁, with best-case improvements exceeding 100%. The method is fast, simple, and compatible with scalable integration via local gate electrodes exhibiting low cross-talk and modest added loss.

Future directions include: refining the optimization algorithm to account for peak width and fluctuation strength; implementing continuous or periodic feedback (potentially machine learning-based) using live error rates to maintain optimal biases; extending characterization to quantify improvements in dephasing times T₂; and integrating per-qubit gates in multi-qubit processors to enable simultaneous, in situ coherence optimization and to support gate protocols that avoid TLS collisions over dynamic frequency trajectories.

• Time-dependent TLS spectral diffusion and interactions with metastable fluctuators can reduce gains over tens of minutes; average T₁ improvement drops from ~30% immediately after optimization to slightly above 20% after 30 minutes.
• Hysteresis in TLS resonance frequencies due to slow fluctuators necessitates careful approach to the optimal field and may require multi-pass sweeps.
• In about 15% of cases, the 30-minute averaged T₁ decreased after optimization, attributed to TLS frequency fluctuations during the averaging window.
• T₁ fluctuations (standard deviation) increased on average by 17% at the optimized field and in 59% of cases overall, indicating potential sensitivity to residual TLS dynamics.
• The benchmarking window was limited to 30 minutes, which may not capture longer-term stability or drift.
• Integration of gate electrodes introduces additional dielectric and radiative loss channels (estimated T₁ limit ~5 ms), and potential cross-talk (though simulated to be <10⁻⁴ in proposed designs).
• Results pertain to a specific transmon implementation and setup; performance may vary with device design, materials, and defect landscapes.