Design and integration of single-qubit rotations and two-qubit gates in silicon above one Kelvin

Two-qubit gates are central to quantum information processing, enabling entanglement and complex algorithms. In quantum dots, exchange interaction between neighboring spins provides natural two-qubit operations. When exchange J greatly exceeds the Zeeman energy difference ΔEz, pulsing J yields SWAP oscillations; when ΔEz ≫ J, it realizes controlled-phase (CPHASE) dynamics. Single-qubit control requires distinguishability (e.g., spin–orbit coupling or nanomagnets), which typically introduces significant ΔEz and favors CPHASE as the native two-qubit gate. Driven, state-dependent rotations can implement controlled-rotation (CROT) gates and even resonant SWAP. Although universality can be achieved with single-qubit rotations plus one entangling gate, having multiple native two-qubit gates reduces operation count. This work aims to integrate, on the same silicon double quantum dot device and at temperatures above 1 K, single-qubit rotations with multiple native two-qubit gates (CROT, CPHASE, SWAP), and to overcome finite ΔEz via tailored adiabatic/diabatic pulse sequences to enable fast, high-fidelity operation while reducing algorithmic overhead.

Prior work established exchange-based two-qubit gates in quantum dots and demonstrated coherent manipulation (e.g., Petta et al., 2005) and donor-based two-qubit operations (He et al., 2019). With significant ΔEz from spin–orbit or micromagnets, pulsed-exchange implementations favor CPHASE gates as the native operation. Driven ESR techniques enable CROT (e.g., Zajac et al., 2018; Huang et al., 2019) and fast two-qubit logic in group-IV systems. Resonant SWAP gates using driven techniques were proposed and demonstrated (Sigillito et al., 2019). Universal logic requires only single-qubit rotations plus one entangling gate (Barenco et al., 1995), but multiple native two-qubit gates can reduce compilation overhead. High-temperature operation (>1 K) enhances cooling power and compatibility with integrated classical control (Yang et al., 2020; Petit et al., 2020), supporting scalable CMOS-based architectures (Veldhorst et al., 2017; Vandersypen et al., 2017; Li et al., 2018).

Device and setup: A silicon double quantum dot (DQD) fabricated with overlapping gate architecture on a 28Si epilayer (residual 29Si ≈ 800 ppm) hosts two electron spin qubits (Q1, Q2). Qubits are defined with charge occupancies N01 = 1 and N02 = 5 to optimize exchange coupling. Spin readout uses Pauli spin blockade at the (1,5)–(2,4) anticrossing: transitions to the singlet (2,4) state occur while other spin states are blocked. Initialization to |↓↑⟩ is achieved by an adiabatic pulse from (2,4) to (1,5). Due to limited sensitivity of the SET charge detector, single-shot traces are averaged and a reference subtracted; spin-state probabilities are reconstructed (Supplementary Note 1). Experiments are performed in a dilution refrigerator at T_fridge ≈ 1.05 K with an external magnetic field B_ext = 250 mT. ESR-based single-spin control is provided by an on-chip aluminum microwave line. Temperature considerations: Readout via spin blockade is relatively insensitive to temperature since no external reservoir is involved, but finite temperature enhances relaxation and reduces initialization fidelity due to thermal population of excited valley states in (2,4). Assuming valley splitting Ev ≈ 300 μeV, the ground singlet (2,4) population is estimated at 87%; Ev > 550 μeV would yield >99% initialization fidelity (Supplementary Note 2). Exchange control and characterization: Exchange interaction J is tuned via interdot detuning ε, with measured J spanning ≈2–45 MHz (Supplementary Fig. 1a). Fitting exchange spectra yields a Zeeman energy difference ΔEz ≈ 11 MHz between qubits, attributed to g-factor variations from spin–orbit coupling; ΔEz shows negligible detuning dependence at the applied low field and with no external magnetic gradients. At J = 3 MHz, four ESR transition frequencies f1–f4 are identified; π-rotation times for CROT are set to t_CROT = 660 ns, synchronizing Rabi oscillations with off-resonant transitions to suppress crosstalk. Ramsey experiments give T2*,01 = 2.3 μs and T2*,02 = 2.9 μs; CPMG extends coherence up to T2,01 ≈ 63 μs and T2,02 ≈ 44 μs with 15 refocusing pulses. CROT implementation: With finite J, target-qubit resonance depends on the control-qubit state, enabling controlled rotations equivalent to CNOT up to phases. Rabi oscillations demonstrating CROT are shown for all four resonance frequencies. Adiabatic CPHASE: Since ΔEz is comparable to accessible J, simple detuning pulses cause tilted SWAP-like rotations in the odd-parity subspace, degrading CPHASE fidelity. To suppress unwanted population transfer, an adiabatic detuning pulse ramps ε to increase J while avoiding diabatic transitions. In Ramsey-like experiments on Q1 with/without a Q2 pulse, conditional phase accumulation is observed; the antiparallel |↓↑⟩ state shifts more strongly than |↑↓⟩, producing different oscillation frequencies and decay times. Tuning the pulse for total conditional phase φ = 3π yields a CPHASE with t_CPHASE = 152 ns, limited mainly by ramp times t_r = 60 ns each; ramps contribute ≈1.7π of phase (comparison to simulations). Geometric/diabatic CPHASE: Gate speed is increased by synchronizing the unavoidable exchange-driven oscillations with the total gate duration, so that the odd-parity states undergo a complete 2n rotation while acquiring a π phase. For a perfectly diabatic pulse, a condition relating J, residual exchange J_res, ΔEz, and pulse duration t_ε is provided (Eq. 1). Experimentally, sweeping detuning amplitude shows that at ε ≈ 68 mV (measured J ≈ 10 MHz), antiparallel states execute a 2n rotation with a π phase, giving a faster CPHASE with t_CPHASE = 67 ns. SWAP and composite SWAP: Direct diabatic detuning pulses induce exchange oscillations between |↓↑⟩ and |↑↓⟩ at f_SWAP = √(J^2 + ΔEz^2). However, finite ΔEz tilts the rotation axis r = (J, 0, ΔEz), limiting population transfer: starting in |↓↑⟩, a maximum |↑↓⟩ probability of ≈64% is observed at t_SWAP ≈ 18 ns (J ≈ 27 MHz). To achieve full SWAP, a composite sequence alternating diabatic (x-rotations) and adiabatic (z-rotations) exchange pulses is used. In the odd-parity subspace, diabatic and adiabatic pulses implement Ud = e^{iΦ} e^{iθσx} and Ua = e^{iθσz}, respectively; a minimal-length sequence satisfying U_tot = Ua Ud Ua Ud Ua = iσx realizes SWAP while canceling global phases. In experiment, exchange amplitudes are calibrated; diabatic pulses (12 ns) to J ≈ 27 MHz move the state to/from the equator, with an adiabatic correction pulse to J ≈ 2.4 MHz of duration t_corr swept to optimize. The optimum t_corr ≈ 62 ns yields a composite SWAP of total duration ≈88–89 ns with >90% SWAP probability. Gate performance simulations: Time-dependent simulations of the Heisenberg Hamiltonian use the measured exchange–detuning curve (Supplementary Note 3) and include finite setup bandwidth (≈300 MHz). Noise is modeled as 1/f detuning fluctuations (Supplementary Note 4), fitted to experimental decoherence. Simulated fidelities F_ideal (no decoherence) and F_noise (with noise) are reported for CROT, CPHASE (adiabatic and diabatic), SWAP, and composite SWAP. Instrumentation: Experiments conducted in a Bluefors refrigerator (T_base ≈ 0.45 K, 3 T magnet); dc voltages via battery-powered sources with Cu-powder, 30 Hz, and 150 kHz filters; ac via on-board bias-tee (3 Hz cutoff). Pulses from Keysight M3202A AWG (14-bit, 1 GS/s); microwaves from Keysight E8267D.

- Demonstration on a single silicon double quantum dot device operated at T ≈ 1.05 K of single-qubit rotations and multiple native two-qubit gates: CROT, CPHASE, and SWAP. - Exchange tunability J ≈ 2–45 MHz; measured Zeeman energy difference ΔEz ≈ 11 MHz with negligible ε-dependence. - Coherence benchmarks at >1 K: Ramsey T2* ≈ 2.3 μs (Q1) and 2.9 μs (Q2); with 15 CPMG refocusing pulses, T2 ≈ 63 μs (Q1) and 44 μs (Q2). - Adiabatic CPHASE gate calibrated to total conditional phase φ = 3π with t_CPHASE = 152 ns (ramps of 60 ns each contributing ~1.7π). - Diabatic/geometric CPHASE achieving t_CPHASE = 67 ns at ε ≈ 68 mV (J ≈ 10 MHz), synchronizing exchange oscillations to a 2n rotation while imparting a π phase. - Direct diabatic SWAP oscillations limited by finite ΔEz yield max |↑↓⟩ population ≈64% at t ≈ 18–19 ns (J ≈ 27 MHz). - Composite SWAP sequence (diabatic–adiabatic–diabatic) overcomes finite ΔEz, with optimized t_corr ≈ 62 ns and total gate time ≈88–89 ns, achieving >90% SWAP probability experimentally. - Simulated gate fidelities (F_ideal/F_noise) at 1.05 K including measured bandwidth and 1/f detuning noise: • CROT (660 ns): 99.4% / 89.0% (consistent with prior measured ≈86%). • Adiabatic CPHASE (152 ns): 99.9% / 97.8%. • Diabatic CPHASE (67 ns): 99.9% / 99.4%. • Single-pulse SWAP (~19 ns): 84.3% / 84.2% (limited by ΔEz). • Composite SWAP (~89 ns): 99.9% / 99.4%. - Initialization at elevated temperature estimated at ~87% ground singlet population for Ev ≈ 300 μeV; >99% feasible for Ev > 550 μeV.

The work addresses the challenge of integrating multiple two-qubit operations with single-qubit control in silicon quantum dots, particularly under realistic conditions with finite ΔEz and operation above 1 K. By combining adiabatic and diabatic pulse engineering, the authors realize fast, high-fidelity entangling operations tailored to the device’s ΔEz/J regime. The adiabatic CPHASE suppresses unwanted population transfer when ΔEz is not much larger than J, while the geometric/diabatic CPHASE leverages synchronized dynamics to yield a shorter gate. For SWAP, a composite pulse sequence compensates for the tilted rotation axis introduced by ΔEz, enabling near-complete population transfer without requiring ΔEz ≈ 0. Simulations incorporating experimentally calibrated exchange–detuning behavior, setup bandwidth, and realistic 1/f detuning noise predict fidelities ≥99% for the diabatic CPHASE and composite SWAP, indicating that a diverse native gate set can be executed with high fidelity even at >1 K. This reduces compilation overhead (e.g., SWAP via 3 CROTs would be ~2 μs; via CPHASE requires many primitives), providing significant speed advantages. The results support the feasibility of hot operation compatible with closer integration of classical control electronics and scalable qubit tiles, while highlighting charge-noise sensitivity as the dominant error mechanism when pulsing detuning for exchange control.

This study demonstrates, on a single silicon DQD device operated at ≈1.05 K, a universal gate set with multiple native two-qubit operations: CROT, adiabatic and diabatic CPHASE, and a high-fidelity composite SWAP. Tailored adiabatic/diabatic pulse sequences overcome finite ΔEz to realize fast gates (≤100 ns) with predicted fidelities above 99% (for diabatic CPHASE and composite SWAP), while coherence times above 40–60 μs are maintained at elevated temperature. These capabilities reduce algorithmic gate overhead (especially for SWAP-based routing), advancing silicon spin qubits as a versatile platform for scalable quantum information processing with potential for integration with classical control at higher temperatures. Future directions include experimental validation of predicted high fidelities, improved initialization via larger valley splitting, enhanced readout fidelity at high T, pulse shaping and optimal control for further robustness, and exchange control via tunnel coupling pulsing at zero detuning to mitigate charge-noise sensitivity.

- Finite Zeeman energy difference (ΔEz ≈ 11 MHz) limits the fidelity of direct, single-pulse SWAP operations and necessitates composite sequences for high fidelity. - Gate fidelities for longer operations (e.g., CROT, adiabatic CPHASE) are impacted by detuning-induced charge noise, especially at elevated temperature; simulations attribute dominant decoherence to 1/f detuning noise. - Readout sensitivity constraints required averaging and reconstruction; SPAM errors and miscalibrations contribute to residual errors in state probability reconstructions and gate performance. - Initialization fidelity is limited (~87%) by thermal occupation of valley states at Ev ≈ 300 μeV; requires larger Ev (>550 μeV) for >99%. - Finite experimental bandwidth (~300 MHz) affects pulse shaping and dynamics, incorporated in simulations but still a practical constraint. - Predicted >99% fidelities for diabatic CPHASE and composite SWAP are based on simulations; experimental verification is needed.