Circuit Implementation of a Four-Dimensional Topological Insulator

This paper presents the experimental implementation of a four-dimensional (4D) topological insulator using electric circuits. The 4D lattice is realized through circuit connections, not by mapping to a lower-dimensional system. Topological surface states, associated with a non-zero second Chern number but vanishing first Chern numbers, are observed on the lattice's 3D surface. This 4D lattice belongs to symmetry class A1, which is topologically trivial in lower dimensions, making this a unique achievement. The study demonstrates the potential of electric circuits for exploring high-dimensional topological models.

You Wang, Hannah M. Price, Baile Zhang, Y. D. Chong