The increasing prevalence of wireless technologies and their higher carrier frequencies and data rates has exacerbated the problem of radio-frequency interference (RFI). This is particularly critical in safety-critical applications such as radar altimeters used in aircraft, where interference from adjacent 5G cellular bands can have life-threatening consequences. Conventional digital signal processing (DSP) methods are limited by their inherent latency and the difficulty in handling time-variant mixing ratios caused by the movement of transceivers. Future wireless systems will demand even lower latency and real-time adaptability to handle this dynamic interference. Photonic integrated circuits (PICs) offer a potential solution due to their ability to process broadband information with ultra-low latency through direct analog processing. However, challenges remain in creating compact, fully integrated systems with co-packaged electronics for real-time operation and online weight adjustment. Existing PICs often lack complete peripheral functionalities and rely on offline processing, resulting in slow control and bulky form factors unsuitable for mobile applications. Blind source separation (BSS) is a promising interference suppression technique that doesn't require prior knowledge of signal characteristics, making it ideal for dynamic environments. BSS can be implemented efficiently on photonic devices such as microring resonators (MRRs) and Mach-Zehnder modulators (MZMs). This paper addresses these challenges by presenting a system-on-chip silicon photonic BSS setup that incorporates a fully integrated photonic signal pathway with co-packaged electronic peripherals for real-time operation.

Existing literature highlights the limitations of conventional digital signal processing in handling dynamic radio frequency interference (RFI), particularly in scenarios with time-varying mixing ratios. Studies demonstrate the potential of photonic integrated circuits (PICs) for low-latency signal processing, but these often lack the fully integrated, compact form factor necessary for real-time applications. Previous work has explored blind source separation (BSS) as a suitable RFI mitigation technique, showcasing its ability to operate without prior knowledge of signal characteristics. However, many implementations have relied on offline processing or limited weight adjustment capabilities, hindering their applicability to dynamic interference scenarios. Research into photonic devices like microring resonators (MRRs) and Mach-Zehnder modulators (MZMs) has demonstrated their suitability for implementing BSS, with advantages in energy efficiency and bandwidth. The challenge addressed in this paper lies in combining the speed and efficiency of photonic BSS with the real-time adaptability and compact packaging required for practical applications, especially in mobile and safety-critical scenarios.

This research developed a system-on-chip silicon photonic blind source separation (BSS) setup, co-packaged with complete electronic peripheral circuitry, to address dynamic radio frequency interference (RFI). The system consists of a fully integrated photonic signal pathway on a photonic integrated circuit (PIC), including modulators, microring resonator (MRR) weight banks, and balanced photodetectors (BPDs). This pathway enables direct analog demixing, resulting in a processing latency of less than 15 picoseconds. The electronic peripherals, implemented on a field-programmable gate array (FPGA), perform high-throughput statistical analysis, including kurtosis calculation, using the Nelder-Mead (NM) optimization algorithm. The FPGA also controls the MRR weights via a high-speed interface, enabling real-time weight adjustment at a rate of 305 Hz. The dithering method was incorporated for precise PIC control. The entire system was packaged into a compact, palm-sized device for portability and robustness. Two experimental emulations of dynamic interference scenarios—mobile communications and radar altimeters—were used for testing and validation. The experimental setup involved two transmitters (signal-of-interest (SOI) and interferer) received by a 2x2 multiple-input and multiple-output (MIMO) antenna system, generating two mixtures of the original signals. The amplitude of the received mixtures is determined by the positions and antenna gains of the transmitters and receiver. The FPGA digitizes the signals, calculates kurtosis, performs NM optimization to determine the optimal demixing weights, and updates the MRR weights accordingly. Error-free operation over 800 bits and signal-to-noise ratios (SNRs) exceeding 15 dB were achieved throughout the experiments.

The key findings demonstrate the successful implementation of a real-time, system-on-chip photonic processor for mitigating dynamic radio frequency interference (RFI). The system achieved a processing latency of less than 15 picoseconds, significantly exceeding the capabilities of electronic counterparts. The fully integrated photonic signal pathway, combined with co-packaged FPGA-based peripherals for real-time weight adjustment, enabled the efficient suppression of RFI in both simulated mobile communication and radar altimeter scenarios. The experiments showed error-free operation over 800 bits and maintained signal-to-noise ratios (SNRs) above 15 dB, validating the system's effectiveness in recovering the signal-of-interest (SOI) in the presence of moving transmitters. The system's compact, palm-sized form factor also highlights its suitability for mobile and field deployments. The use of the Nelder-Mead optimization algorithm, coupled with high-speed FPGA processing and the dithering technique, allowed for accurate and rapid weight adjustments, crucial for tracking the optimal demixing weights in time-varying interference environments. The system's low power consumption (<10W) and ability to operate with sub-Nyquist sampling further demonstrate its practical viability for real-world applications.

The results demonstrate the significant potential of integrated silicon photonics for solving the challenge of dynamic radio frequency interference (RFI) in real-time applications. The picosecond latency achieved by the photonic processor represents a substantial improvement over conventional digital signal processing (DSP) methods, making it particularly suitable for safety-critical systems where timely signal processing is crucial. The system's ability to maintain high signal-to-noise ratios (SNRs) in the presence of moving transmitters highlights its adaptability to dynamic RFI scenarios. The compact design and low power consumption indicate the feasibility of integrating this technology into mobile and field-deployable devices. Future research could explore scaling the system to handle a larger number of signals and incorporating more sophisticated blind source separation (BSS) algorithms. Investigating different photonic components and architectures could further optimize performance and reduce power consumption. The successful demonstration of real-time online learning and weight adjustments opens up exciting possibilities for developing adaptive and intelligent signal processing systems for a wide range of wireless applications.

This research successfully demonstrated a system-on-chip microwave photonic processor capable of real-time RFI mitigation with unprecedented picosecond latency. The fully integrated photonic signal pathway, coupled with high-speed FPGA-based peripherals, enables accurate and rapid demixing of signals in dynamic environments. The compact and low-power design makes it suitable for mobile and field applications. Future work could focus on expanding the system's capacity and integrating more sophisticated signal processing algorithms to address even more complex RFI scenarios.

While the research successfully demonstrates the feasibility of real-time photonic RFI mitigation, some limitations exist. The current implementation is limited to a 2x2 MIMO system; scaling to larger systems may require further optimization. The accuracy of the blind source separation (BSS) algorithm is dependent on the statistical properties of the signals and the quality of the kurtosis estimation. Environmental factors, such as temperature variations, could affect the performance of the photonic components. Further research is needed to address these limitations and improve the robustness and scalability of the system.