Many crucial applications demand continual online learning from noisy data and real-time decision-making with defined confidence. Brain-inspired probabilistic models offer a way to handle data uncertainty and allow adaptive learning. However, compact, low-power hardware implementation remains challenging. This research addresses this challenge by presenting a novel hardware fabric for a stochastic neural network, the Neural Sampling Machine (NSM). The NSM leverages the inherent stochasticity in synaptic connections to perform approximate Bayesian inference, a capability crucial for robust and adaptable AI systems. The ability to implement such a network in a compact and energy-efficient way is a major step towards more brain-like AI.

The paper reviews existing research on brain-inspired computing, focusing on analog multi-bit synapses and bio-inspired neuronal circuits built using emerging materials and devices. These devices often exhibit inherent stochasticity, typically treated as noise. However, the authors highlight that variability in biological neural networks at the molecular level is believed to contribute to brain computation, citing work on the unreliable nature of synaptic vesicle release. This multiplicative synaptic noise plays a key role in learning and probabilistic inference. The paper then discusses Neural Sampling Machines (NSMs), which introduce stochasticity at various levels to escape local minima, regularize networks, enable approximate Bayesian inference via Monte Carlo sampling, and enhance energy efficiency. NSMs contrast with techniques like DropConnect, as the synaptic stochasticity in NSMs is 'always-on,' enabling probabilistic inference and continual learning. The authors note that previous research has shown that networks with 'always-on' stochasticity can match or surpass current machine learning algorithms.

The researchers propose a hardware implementation of the NSM using hybrid stochastic synapses comprising an embedded non-volatile memory (eNVM) in series with a two-terminal stochastic selector element. They experimentally demonstrate this hybrid synapse using a doped HfO2 FeFET-based analog weight cell and a two-terminal Ag/HfO2 stochastic selector. This setup is integrated within a crossbar array architecture for compute-in-memory (CIM), aiming for energy efficiency by reducing data movement. The inherent stochastic switching of the selector between insulator and metallic states performs Bernoulli sampling of the FeFET conductance states during learning and inference. The theoretical model of the NSM uses binary threshold neurons with a multiplicative Bernoulli noise term. The probability of a neuron firing is derived, revealing a self-normalizing effect that performs automatic weight normalization and prevents internal covariate shift online. The FeFET-based analog weight cell is characterized experimentally, showing conductance modulation via voltage pulses. The Ag/HfO2 stochastic selector is also characterized, showing stochastic switching behavior modeled by an Ornstein-Uhlenbeck (OU) process. This OU process accurately captures the cycle-to-cycle variation, distribution, and autocorrelation of the selector's threshold voltage. The hardware NSM is then tested on MNIST handwritten digit classification, comparing it to a deterministic MLP and a theoretical NSM model. Training uses backpropagation and a softmax layer, with weight updates during backpropagation derived from the NSM's stochastic nature. The 'always-on' stochasticity during inference allows for Monte Carlo sampling, enabling Bayesian inferencing.

The research demonstrates a functional hardware implementation of a Neural Sampling Machine (NSM) using a novel hybrid stochastic synapse architecture. The experimental results confirm the key theoretical properties of the NSM. The NSM achieves high accuracy (98.25%) in MNIST image classification, comparable to deterministic neural networks. Critically, simulations show the NSM's ability to perform Bayesian inference and quantify uncertainty in predictions, a feature absent in conventional deterministic networks. The inherent weight normalization within the NSM is demonstrated, showing a tighter distribution of weights and activations compared to a conventional MLP, mitigating the internal covariate shift problem. This self-normalization effect is shown to be more effective than adding regularization to a conventional MLP. The multiplicative nature of the noise introduced by the stochastic selector is verified experimentally, showing a close match with the theoretical Bernoulli distribution. The stochastic selector device's behavior is effectively modeled using an Ornstein-Uhlenbeck process.

The findings demonstrate that inherent stochasticity, rather than being a hindrance, can be a powerful computational mechanism in neural networks. The NSM's online weight normalization provides an advantageous alternative to batch normalization and dropout techniques, offering benefits in terms of preventing saturation, handling weight fluctuations, and mitigating internal covariate shift. The successful implementation of the NSM on hardware showcases the feasibility of building energy-efficient, brain-inspired computing architectures. The ability to perform Bayesian inference and quantify prediction uncertainty is a significant advance toward creating more robust and reliable AI systems. While the study focuses on specific devices, the principles are applicable to other emerging memory technologies.

This work successfully demonstrates a hardware implementation of a Neural Sampling Machine (NSM) leveraging stochastic synapses for efficient and accurate machine learning. The NSM achieves high classification accuracy and effectively quantifies prediction uncertainty. Future research should focus on developing efficient on-chip learning mechanisms for the NSM and explore the use of alternative emerging devices for building stochastic synapses.

The current implementation of the hardware NSM has limitations stemming from the dynamic range and non-idealities of the FeFET-based synaptic weight cell, including cycle-to-cycle and device-to-device variations, non-linearity, and asymmetric conductance changes. The on-chip training of the NSM presents additional challenges related to bidirectional connections, backpropagation through stochastic activation functions, and computation of weight normalization parameters. Approximations to address these challenges warrant further investigation.