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Hybrid architecture based on two-dimensional memristor crossbar array and CMOS integrated circuit for edge computing

Engineering and Technology

Hybrid architecture based on two-dimensional memristor crossbar array and CMOS integrated circuit for edge computing

P. Kumar, K. Zhu, et al.

Discover a revolutionary hybrid architecture for edge computing that effectively merges a 2D memristor crossbar array with CMOS circuitry to implement the extreme learning machine algorithm. This exciting research conducted by Pratik Kumar, Kaichen Zhu, Xu Gao, Sui-Dong Wang, Mario Lanza, and Chetan Singh Thakur showcases impressive performance in tackling complex audio, image, and non-linear classification tasks using real-time datasets.

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Playback language: English
Abstract
This paper presents a hybrid architecture for edge computing, combining a 2D memristor crossbar array with CMOS circuitry to implement the extreme learning machine (ELM) algorithm. A hexagonal boron nitride (h-BN) based memristor crossbar array acts as the decoder, while a CMOS circuit functions as the encoder. The hybrid architecture demonstrates effective performance on complex audio, image, and other non-linear classification tasks using real-time datasets.
Publisher
npj 2D Materials and Applications
Published On
Jan 21, 2022
Authors
Pratik Kumar, Kaichen Zhu, Xu Gao, Sui-Dong Wang, Mario Lanza, Chetan Singh Thakur
Tags
edge computing
memristor crossbar
CMOS circuitry
extreme learning machine
non-linear classification
real-time datasets
hybrid architecture

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