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Hybrid architecture based on two-dimensional memristor crossbar array and CMOS integrated circuit for edge computing

Engineering and Technology

Hybrid architecture based on two-dimensional memristor crossbar array and CMOS integrated circuit for edge computing

P. Kumar, K. Zhu, et al.

Discover a revolutionary hybrid architecture for edge computing that effectively merges a 2D memristor crossbar array with CMOS circuitry to implement the extreme learning machine algorithm. This exciting research conducted by Pratik Kumar, Kaichen Zhu, Xu Gao, Sui-Dong Wang, Mario Lanza, and Chetan Singh Thakur showcases impressive performance in tackling complex audio, image, and non-linear classification tasks using real-time datasets.

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~3 min • Beginner • English
Abstract
The fabrication of integrated circuits (ICs) employing two-dimensional (2D) materials is a major goal of semiconductor industry for the next decade, as it may allow the extension of the Moore's law, aids in in-memory computing and enables the fabrication of advanced devices beyond conventional complementary metal-oxide-semiconductor (CMOS) technology. However, most circuital demonstrations so far utilizing 2D materials employ methods such as mechanical exfoliation that are not up-scalable for wafer-level fabrication, and their application could achieve only simple functionalities such as logic gates. Here, we present the fabrication of a crossbar array of memristors using multilayer hexagonal boron nitride (h-BN) as dielectric, that exhibit analog bipolar resistive switching in >96% of devices, which is ideal for the implementation of multi-state memory element in most of the neural networks, edge computing and machine learning applications. Instead of only using this memristive crossbar array to solve a simple logical problem, here we go a step beyond and present the combination of this h-BN crossbar array with CMOS circuitry to implement extreme learning machine (ELM) algorithm. The CMOS circuit is used to design the encoder unit, and a h-BN crossbar array of 2D hexagonal boron nitride (h-BN) based memristors is used to implement the decoder functionality. The proposed hybrid architecture is demonstrated for complex audio, image, and other non-linear classification tasks on real-time datasets.
Publisher
npj 2D Materials and Applications
Published On
Jan 21, 2022
Authors
Pratik Kumar, Kaichen Zhu, Xu Gao, Sui-Dong Wang, Mario Lanza, Chetan Singh Thakur
Tags
edge computing
memristor crossbar
CMOS circuitry
extreme learning machine
non-linear classification
real-time datasets
hybrid architecture
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