Quantum systems are inherently susceptible to continuous noise processes, which introduce errors during quantum computations. Quantum error correction (QEC) addresses this challenge by encoding information redundantly and employing error detection mechanisms. Effective QEC codes require a balance between the reduction of logical errors and the overhead costs (additional qubits and gates) associated with error correction. Previous implementations of QEC have primarily relied on discrete rounds of error correction, using multi-qubit parity measurements involving entangling gates and ancillary qubits. These discrete methods suffer from vulnerabilities to errors occurring during gate operations and errors in the ancillary qubits themselves. Continuous measurement techniques, in contrast, involve monitoring a quantum system over a finite duration, allowing for the detection of errors as they occur. In the context of QEC, continuous measurement allows for an alternative paradigm, continuous QEC, wherein continuous stabilizer measurements eliminate the need for discrete error correction cycles, ancillary qubits, and entangling gates. This work experimentally demonstrates a continuous QEC protocol, specifically focusing on correcting bit-flip errors using a three-qubit repetition code and continuous parity measurements, offering a potential pathway towards more robust and resource-efficient fault-tolerant quantum computation.

The existing literature extensively covers discrete QEC implementations in various systems like ion traps, diamond defects, and superconducting circuits. These systems typically employ discrete rounds of error correction involving projective multi-qubit parity measurements, relying on entangling gates and ancillary qubits. However, these methods are prone to errors associated with the gates and ancillary qubits. Continuous measurements have also been explored for stabilizing single-qubit dynamics. Previous work shows that continuous measurements of parity can be used to prepare entangled states through measurement. The concept of continuous QEC, using continuous stabilizer measurements to eliminate discrete correction cycles and ancillary resources, has also been theoretically investigated but lacked experimental demonstration. This paper directly addresses this gap by experimentally implementing and characterizing a continuous QEC protocol.

The experiment uses a planar superconducting architecture comprising three transmon qubits. Two ZZ parity measurements are implemented using two pairs of qubits coupled to joint readout resonators. The resonators are designed to distinguish between even and odd parity states. The three-qubit repetition code uses two ZZ parity measurements (Z₀Z₁ and Z₁Z₂) as stabilizers. The codespace is chosen to be the subspace with negative (odd) parity values. The logical code states are |0⟩ = |000⟩ and |1⟩ = |111⟩. Changes in parity signals indicate bit-flip errors. The experimental setup employs homodyne detection to obtain noisy voltage traces correlated to stabilizer eigenvalues. A simplified thresholding scheme, implemented on an FPGA, is used to process the noisy voltage traces and identify bit flips. When a threshold is crossed, a corrective π-pulse is applied to the faulty qubit. The FPGA also resets the voltage signals to reflect the updated state. The correction efficiency for single bit-flips is measured for each qubit. The dead time, during which a second error cannot be reliably corrected, is also characterized by applying two successive bit-flips with varying time intervals. Finally, the experiment investigates the effects of the continuous error correction on logical coherence, focusing on the T₁ relaxation times of the logical qubit and the induced dephasing mechanisms.

The experiment achieved an average bit-flip detection efficiency of up to 91%. The continuous error correction protocol increased the relaxation time (T₁) of the protected logical qubit by a factor of 2.7 compared to the bare qubits. The FPGA-based thresholding scheme effectively corrects single bit-flip errors. The dead time between correctable errors was measured to be between 1.6 and 2.6 µs. The analysis identified three main sources of excess dephasing: measurement-induced dephasing, dephasing during transitions between odd and even parity states, and dephasing due to static ZZ interactions between qubits. Measurement-induced dephasing was quantified and found to be relatively low. Dephasing during parity changes was significant due to differences in resonator photon numbers. Dephasing from static ZZ interactions was also identified and its effect on logical coherence was characterized. The experimental results show oscillations in logical coherence consistent with the effects of ZZ coupling.

The experimental results demonstrate the feasibility and effectiveness of continuous quantum error correction for bit-flip errors in a superconducting qubit system. The significant improvement in the T₁ relaxation time of the logical qubit directly addresses the critical challenge of maintaining coherence in quantum systems. The resource-efficient nature of the continuous QEC approach, avoiding the need for ancillary qubits and entangling gates, represents a notable advancement. The identified sources of excess dephasing provide valuable insights for future improvements and highlight the importance of minimizing qubit coupling and optimizing measurement parameters. The findings offer a promising path towards building larger-scale, fault-tolerant quantum computers.

This work presents the first experimental demonstration of continuous quantum error correction for bit-flip errors in a superconducting qubit system. The protocol successfully increases the coherence time of the logical qubit while requiring fewer resources than traditional methods. Future work should focus on extending the protocol to correct phase-flip errors and to improve performance by mitigating the identified sources of decoherence. This may involve exploring alternative continuous parity measurement schemes, optimizing coupling parameters, and implementing feedback control to counteract measurement-induced dephasing. The approach taken in this work represents a crucial step towards the construction of more robust and scalable quantum computers.

The current implementation only protects against bit-flip errors; phase-flip errors are not addressed. The observed excess dephasing, although quantified and analyzed, still limits the overall performance. The scalability of the method for larger qubit numbers needs further investigation. The complexity of the FPGA control system could become a limitation in larger-scale implementations. The thresholding scheme is a simplified approach; more sophisticated algorithms could potentially improve performance.